Innovative Solutions for Nanofabrication and Semiconductor Navigation INNOVATIVE SOLUTIONS FOR NANOFABRICATION AND SEMICONDUCTOR NAVIGATION

MN178 Electrical characterization of InAs-nanocrystal-based nonvolatile memories Moïra Hocevar, Philippe Regreny, Michel Gendry, Abdelkader Souifi Institut des Nanotechnologies de Lyon-INL, UMR-CNRS-5270, INSA de Lyon, 7 avenue Jean Capelle, 69621 Villeurbanne Cedex, France, [email protected] The development of highly integrated nonvolatile memory (NVM) devices has led to the use of Si or Ge nanocrystals (NCs) embedded in the SiO2 gate oxide of metal-oxide-semiconductor (MOS) structures instead of conventional polycristalline silicon floating gates [1-2]. In order to improve data retention, Si and Ge could be replaced by InAs due to its smaller energy gap. Moreover, the smaller carrier effective mass in InAs allows a better separation of the electronic levels in the nanocrystals, making it attractive for multibit storage. In this context, we propose to fabricate and characterize MOS structures containing InAs NCs and intended to integrate a memory cell (Fig. 1). InAs NCs were grown by molecular beam epitaxy directly on the SiO2 tunnel layer and then capped with a SiO2 control layer. In such architectures (Fig. 2), the tunnel and the control oxide thicknesses are very well controlled such as both InAs NCs density and size [3]. Aluminum gates were deposited for electrical characterizations of InAs NCs based MOS structures. The study of the charge carrier retention in NCs has been achieved using capacitance-voltage (C-V) measurements. Positive and negative biases have been applied to the gate during 30 s. The flat-band shift is negative for negative bias applied to the gate and positive when the bias is positive (Figure 3). Thus, we conclude about a hole tunneling from the substrate towards the NCs in accumulation conditions and electron tunneling in inversion conditions. The retention time has been determined using capacitance-time (C-t) measurements. The discharge kinetics is very slow, which demonstrate a very good retention time for holes and electrons. Moreover, the retention time for electrons is better in InAs than in Si and in Ge [4], which was confirmed by calculations (Figure 4). We assume that it is mainly due to the higher conduction band offset between InAs and SiO2. In conclusion, we have shown that it is possible to store both electrons and holes in the InAs NCs. Moreover the retention behavior is very good, especially for the electrons comparing with Si NCs and Ge NCs based NVM. [1] S. Tiwari et al., Appl. Phys. Lett. 68 (1996) 1377. [2] B. De Salvo et al., IEDM Tech. Dig. (2003) 597. [3] M. Hocevar et al., submitted to Appl. Phys. Lett. (2007). [4] M. Kanoun et al., Appl. Phys. Lett. 84 (2004) 5079.